f4pga/source
Unai Martinez-Corral b8fb61719e requirements: use symbolator and hdlparse from org hdl
Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
2022-02-10 04:14:24 +01:00
..
fasm@6308864592 requirements: use symbolator and hdlparse from org hdl 2022-02-10 04:14:24 +01:00
images Add SymbiFlow toolchain description 2019-09-25 21:50:21 +02:00
prjtrellis@9b3db7ba9a requirements: use symbolator and hdlparse from org hdl 2022-02-10 04:14:24 +01:00
prjxray@f7f06896ad Bump source/prjxray from `6e6bff0` to `f7f0689` 2021-07-09 05:34:16 +00:00
symbiflow-arch-defs@b483f25497 requirements: use symbolator and hdlparse from org hdl 2022-02-10 04:14:24 +01:00
toolchain-desc Add information about inverter logic in techmaps 2020-09-28 11:30:12 +02:00
vtr-verilog-to-routing@d58f993d07 requirements: use symbolator and hdlparse from org hdl 2022-02-10 04:14:24 +01:00
conf.py Add sphinx-verilog-domain to Sphinx configuration 2020-09-22 14:37:30 +02:00
index.rst Use fasm specification from fasm repository 2019-09-25 21:50:21 +02:00
introduction.rst Add more information about SymbiFlow to introduction 2019-09-19 09:38:40 +02:00
toolchain-desc.rst Replace VPR abstract with official VPR documentation 2019-09-25 21:50:21 +02:00