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litedram_gen: Set default csr_data_width to 32 (similar to LiteX).

This commit is contained in:
Florent Kermarrec 2021-10-07 15:05:56 +02:00
parent 6b0a35b309
commit 0bb3bff8af
1 changed files with 1 additions and 1 deletions
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2
litedram/gen.py
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@ -477,7 +477,7 @@ class LiteDRAMCore(SoCCore):
sys_clk_freq = core_config["sys_clk_freq"] sys_clk_freq = core_config["sys_clk_freq"]
cpu_type = core_config["cpu"] cpu_type = core_config["cpu"]
cpu_variant = core_config.get("cpu_variant", "standard") cpu_variant = core_config.get("cpu_variant", "standard")
csr_data_width = core_config.get("csr_data_width", 8) csr_data_width = core_config.get("csr_data_width", 32)
uart_type = core_config.get("uart", "rs232") uart_type = core_config.get("uart", "rs232")
if cpu_type is None: if cpu_type is None:
kwargs["integrated_rom_size"] = 0 kwargs["integrated_rom_size"] = 0