frontend/bist: small cleanup
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a613c49783
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@ -72,6 +72,7 @@ class Counter(Module):
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self.sync += self.o.eq(self.o + 1)
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@ResetInserter()
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class _LiteDRAMBISTGenerator(Module):
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def __init__(self, dram_port, random):
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@ -144,7 +145,7 @@ class LiteDRAMBISTGenerator(Module, AutoCSR):
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cd = dram_port.cd
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core = ResetInserter()(_LiteDRAMBISTGenerator(dram_port, random))
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core = _LiteDRAMBISTGenerator(dram_port, random)
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self.submodules.core = ClockDomainsRenamer(cd)(core)
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reset_sync = PulseSynchronizer("sys", cd)
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@ -177,6 +178,7 @@ class LiteDRAMBISTGenerator(Module, AutoCSR):
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]
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@ResetInserter()
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class _LiteDRAMBISTChecker(Module, AutoCSR):
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def __init__(self, dram_port, random):
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@ -285,7 +287,7 @@ class LiteDRAMBISTChecker(Module, AutoCSR):
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cd = dram_port.cd
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core = ResetInserter()(_LiteDRAMBISTChecker(dram_port, random))
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core = _LiteDRAMBISTChecker(dram_port, random)
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self.submodules.core = ClockDomainsRenamer(cd)(core)
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reset_sync = PulseSynchronizer("sys", cd)
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