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test/reference: update.

This commit is contained in:
Florent Kermarrec 2020-12-17 18:21:53 +01:00
parent d8eccebbbc
commit 103072c68a
2 changed files with 6 additions and 6 deletions
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6
test/reference/ddr3_init.h
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@ -21,9 +21,9 @@
#define SDRAM_PHY_PHASES 4 #define SDRAM_PHY_PHASES 4
#define SDRAM_PHY_CL 7 #define SDRAM_PHY_CL 7
#define SDRAM_PHY_CWL 6 #define SDRAM_PHY_CWL 6
#define SDRAM_PHY_CMD_LATENCY 1 #define SDRAM_PHY_CMD_LATENCY 0
#define SDRAM_PHY_RDPHASE 0 #define SDRAM_PHY_RDPHASE 1
#define SDRAM_PHY_WRPHASE 1 #define SDRAM_PHY_WRPHASE 2
#define SDRAM_PHY_WRITE_LEVELING_CAPABLE #define SDRAM_PHY_WRITE_LEVELING_CAPABLE
#define SDRAM_PHY_WRITE_LATENCY_CALIBRATION_CAPABLE #define SDRAM_PHY_WRITE_LATENCY_CALIBRATION_CAPABLE
#define SDRAM_PHY_READ_LEVELING_CAPABLE #define SDRAM_PHY_READ_LEVELING_CAPABLE

6
test/reference/ddr4_init.h
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@ -21,9 +21,9 @@
#define SDRAM_PHY_PHASES 4 #define SDRAM_PHY_PHASES 4
#define SDRAM_PHY_CL 9 #define SDRAM_PHY_CL 9
#define SDRAM_PHY_CWL 9 #define SDRAM_PHY_CWL 9
#define SDRAM_PHY_CMD_LATENCY 1 #define SDRAM_PHY_CMD_LATENCY 0
#define SDRAM_PHY_RDPHASE 2 #define SDRAM_PHY_RDPHASE 3
#define SDRAM_PHY_WRPHASE 2 #define SDRAM_PHY_WRPHASE 3
#define SDRAM_PHY_WRITE_LEVELING_CAPABLE #define SDRAM_PHY_WRITE_LEVELING_CAPABLE
#define SDRAM_PHY_WRITE_LEVELING_REINIT #define SDRAM_PHY_WRITE_LEVELING_REINIT
#define SDRAM_PHY_WRITE_LATENCY_CALIBRATION_CAPABLE #define SDRAM_PHY_WRITE_LATENCY_CALIBRATION_CAPABLE