Update test/reference/*_init.h
Signed-off-by: Ryszard Różak <rrozak@antmicro.com>
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@ -30,7 +30,8 @@
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#define SDRAM_PHY_WRITE_LATENCY_CALIBRATION_CAPABLE
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#define SDRAM_PHY_WRITE_DQ_DQS_TRAINING_CAPABLE
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#define SDRAM_PHY_READ_LEVELING_CAPABLE
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#define SDRAM_PHY_MODULES (SDRAM_PHY_DATABITS/8)
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#define SDRAM_PHY_DQ_DQS_RATIO 8
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#define SDRAM_PHY_MODULES 8
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#define SDRAM_PHY_DELAYS 32
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#define SDRAM_PHY_BITSLIPS 8
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@ -29,7 +29,8 @@
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#define SDRAM_PHY_WRITE_LEVELING_CAPABLE
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#define SDRAM_PHY_WRITE_LATENCY_CALIBRATION_CAPABLE
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#define SDRAM_PHY_READ_LEVELING_CAPABLE
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#define SDRAM_PHY_MODULES (SDRAM_PHY_DATABITS/8)
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#define SDRAM_PHY_DQ_DQS_RATIO 8
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#define SDRAM_PHY_MODULES 8
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#define SDRAM_PHY_DELAYS 512
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#define SDRAM_PHY_BITSLIPS 8
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@ -25,7 +25,8 @@
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#define SDRAM_PHY_CWL 2
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#define SDRAM_PHY_RDPHASE 0
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#define SDRAM_PHY_WRPHASE 0
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#define SDRAM_PHY_MODULES (SDRAM_PHY_DATABITS/8)
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#define SDRAM_PHY_DQ_DQS_RATIO 8
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#define SDRAM_PHY_MODULES 2
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void cdelay(int i);
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