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Update test/reference/*_init.h 

Signed-off-by: Ryszard Różak <rrozak@antmicro.com>
This commit is contained in:
Ryszard Różak 2022-03-30 12:59:53 +02:00
parent 574df6f908
commit 18d25d84c3
3 changed files with 6 additions and 3 deletions
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3
test/reference/ddr3_init.h
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@ -30,7 +30,8 @@
#define SDRAM_PHY_WRITE_LATENCY_CALIBRATION_CAPABLE #define SDRAM_PHY_WRITE_LATENCY_CALIBRATION_CAPABLE
#define SDRAM_PHY_WRITE_DQ_DQS_TRAINING_CAPABLE #define SDRAM_PHY_WRITE_DQ_DQS_TRAINING_CAPABLE
#define SDRAM_PHY_READ_LEVELING_CAPABLE #define SDRAM_PHY_READ_LEVELING_CAPABLE
#define SDRAM_PHY_MODULES (SDRAM_PHY_DATABITS/8) #define SDRAM_PHY_DQ_DQS_RATIO 8
#define SDRAM_PHY_MODULES 8
#define SDRAM_PHY_DELAYS 32 #define SDRAM_PHY_DELAYS 32
#define SDRAM_PHY_BITSLIPS 8 #define SDRAM_PHY_BITSLIPS 8

3
test/reference/ddr4_init.h
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@ -29,7 +29,8 @@
#define SDRAM_PHY_WRITE_LEVELING_CAPABLE #define SDRAM_PHY_WRITE_LEVELING_CAPABLE
#define SDRAM_PHY_WRITE_LATENCY_CALIBRATION_CAPABLE #define SDRAM_PHY_WRITE_LATENCY_CALIBRATION_CAPABLE
#define SDRAM_PHY_READ_LEVELING_CAPABLE #define SDRAM_PHY_READ_LEVELING_CAPABLE
#define SDRAM_PHY_MODULES (SDRAM_PHY_DATABITS/8) #define SDRAM_PHY_DQ_DQS_RATIO 8
#define SDRAM_PHY_MODULES 8
#define SDRAM_PHY_DELAYS 512 #define SDRAM_PHY_DELAYS 512
#define SDRAM_PHY_BITSLIPS 8 #define SDRAM_PHY_BITSLIPS 8

3
test/reference/sdr_init.h
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@ -25,7 +25,8 @@
#define SDRAM_PHY_CWL 2 #define SDRAM_PHY_CWL 2
#define SDRAM_PHY_RDPHASE 0 #define SDRAM_PHY_RDPHASE 0
#define SDRAM_PHY_WRPHASE 0 #define SDRAM_PHY_WRPHASE 0
#define SDRAM_PHY_MODULES (SDRAM_PHY_DATABITS/8) #define SDRAM_PHY_DQ_DQS_RATIO 8
#define SDRAM_PHY_MODULES 2
void cdelay(int i); void cdelay(int i);