frontend/axi: add assertion on matching axi, native port data_width
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@ -32,6 +32,7 @@ class LiteDRAMAXIPort(AXIInterface):
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class LiteDRAMAXI2NativeW(Module):
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class LiteDRAMAXI2NativeW(Module):
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def __init__(self, axi, port, buffer_depth, base_address):
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def __init__(self, axi, port, buffer_depth, base_address):
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assert axi.address_width >= log2_int(base_address)
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assert axi.address_width >= log2_int(base_address)
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assert axi.data_width == port.data_width
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self.cmd_request = Signal()
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self.cmd_request = Signal()
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self.cmd_grant = Signal()
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self.cmd_grant = Signal()
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@ -99,6 +100,7 @@ class LiteDRAMAXI2NativeW(Module):
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class LiteDRAMAXI2NativeR(Module):
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class LiteDRAMAXI2NativeR(Module):
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def __init__(self, axi, port, buffer_depth, base_address):
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def __init__(self, axi, port, buffer_depth, base_address):
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assert axi.address_width >= log2_int(base_address)
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assert axi.address_width >= log2_int(base_address)
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assert axi.data_width == port.data_width
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self.cmd_request = Signal()
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self.cmd_request = Signal()
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self.cmd_grant = Signal()
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self.cmd_grant = Signal()
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