frontend/axi: add assertion on matching axi, native port data_width

This commit is contained in:
Gabriel Somlo 2019-10-23 10:01:18 -04:00
parent d84e1b4ac5
commit 24203cfc7b
1 changed files with 2 additions and 0 deletions

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@ -32,6 +32,7 @@ class LiteDRAMAXIPort(AXIInterface):
class LiteDRAMAXI2NativeW(Module): class LiteDRAMAXI2NativeW(Module):
def __init__(self, axi, port, buffer_depth, base_address): def __init__(self, axi, port, buffer_depth, base_address):
assert axi.address_width >= log2_int(base_address) assert axi.address_width >= log2_int(base_address)
assert axi.data_width == port.data_width
self.cmd_request = Signal() self.cmd_request = Signal()
self.cmd_grant = Signal() self.cmd_grant = Signal()
@ -99,6 +100,7 @@ class LiteDRAMAXI2NativeW(Module):
class LiteDRAMAXI2NativeR(Module): class LiteDRAMAXI2NativeR(Module):
def __init__(self, axi, port, buffer_depth, base_address): def __init__(self, axi, port, buffer_depth, base_address):
assert axi.address_width >= log2_int(base_address) assert axi.address_width >= log2_int(base_address)
assert axi.data_width == port.data_width
self.cmd_request = Signal() self.cmd_request = Signal()
self.cmd_grant = Signal() self.cmd_grant = Signal()