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phy/kusddrphy: use rdly_dq_bitslip_rst CSR for bitslip reset

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This commit is contained in:
Florent Kermarrec 2018-12-17 11:04:45 +01:00
parent 1ece2ca7b7
commit 28b7d3264c
1 changed files with 1 additions and 1 deletions
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2
litedram/phy/kusddrphy.py
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@ -340,7 +340,7 @@ class KUSDDRPHY(Module, AutoCSR):
dq_bitslip = BitSlip(8)
self.sync += \
If(self._dly_sel.storage[i//8],
If(self._wdly_dq_rst.re,
If(self._rdly_dq_bitslip_rst.re,
dq_bitslip.value.eq(0)
).Elif(self._rdly_dq_bitslip.re,
dq_bitslip.value.eq(dq_bitslip.value + 1)