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init: Cleanup PHY lists in capabilities.

This commit is contained in:
Florent Kermarrec 2021-04-22 17:38:14 +02:00
parent fda8689142
commit 3f4b6f661c
1 changed files with 7 additions and 4 deletions
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11
litedram/init.py
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@ -685,13 +685,16 @@ def get_sdram_phy_c_header(phy_settings, timing_settings):
r += "#define SDRAM_PHY_WRPHASE "+str(wrphase)+"\n"
# Define Read/Write Leveling capability
if phytype in ["USDDRPHY", "USPDDRPHY", 'K7DDRPHY', 'V7DDRPHY', 'K7LPDDR4PHY', 'V7LPDDR4PHY']:
if phytype in ["USDDRPHY", "USPDDRPHY",
"K7DDRPHY", "V7DDRPHY",
"K7LPDDR4PHY", "V7LPDDR4PHY"]:
r += "#define SDRAM_PHY_WRITE_LEVELING_CAPABLE\n"
if phytype in ["USDDRPHY", "USPDDRPHY", 'A7DDRPHY', 'K7DDRPHY', 'V7DDRPHY', 'A7LPDDR4PHY',
'K7LPDDR4PHY', 'V7LPDDR4PHY']:
if phytype in ["USDDRPHY", "USPDDRPHY",
"A7DDRPHY", "K7DDRPHY", "V7DDRPHY",
"A7LPDDR4PHY", "K7LPDDR4PHY", "V7LPDDR4PHY"]:
r += "#define SDRAM_PHY_WRITE_LATENCY_CALIBRATION_CAPABLE\n"
r += "#define SDRAM_PHY_READ_LEVELING_CAPABLE\n"
if phytype in ['K7LPDDR4PHY', 'V7LPDDR4PHY']:
if phytype in ["K7LPDDR4PHY", "V7LPDDR4PHY"]:
r += "#define SDRAM_PHY_WRITE_DQ_DQS_TRAINING_CAPABLE\n"
if phytype in ["ECP5DDRPHY"]:
r += "#define SDRAM_PHY_READ_LEVELING_CAPABLE\n"