core: add LiteDRAMCore (ControllerInjector from LiteX)
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from migen import *
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from litex.soc.interconnect.csr import AutoCSR
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from litedram.dfii import DFIInjector
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from litedram.core.controller import ControllerSettings, LiteDRAMController
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from litedram.core.crossbar import LiteDRAMCrossbar
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# Core ---------------------------------------------------------------------------------------------
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class LiteDRAMCore(Module, AutoCSR):
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def __init__(self, phy, geom_settings, timing_settings, clk_freq, **kwargs):
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self.submodules.dfii = DFIInjector(
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addressbits = geom_settings.addressbits,
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bankbits = geom_settings.bankbits,
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nranks = phy.settings.nranks,
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databits = phy.settings.dfi_databits,
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nphases = phy.settings.nphases)
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self.comb += self.dfii.master.connect(phy.dfi)
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self.submodules.controller = controller = LiteDRAMController(
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phy_settings = phy.settings,
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geom_settings = geom_settings,
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timing_settings = timing_settings,
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clk_freq = clk_freq,
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**kwargs)
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self.comb += controller.dfi.connect(self.dfii.slave)
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self.submodules.crossbar = LiteDRAMCrossbar(controller.interface)
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