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modules: modules: add LPDDR4 module

This commit is contained in:
Jędrzej Boczar 2021-02-03 16:06:46 +01:00
parent 6943a1a4a5
commit 788b3f6d02
1 changed files with 15 additions and 0 deletions
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15
litedram/modules.py
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@ -964,3 +964,18 @@ class MTA18ASF2G72PZ(DDR4RegisteredModule):
"2400": _SpeedgradeTimings(tRP=13.32, tRCD=13.32, tWR=15, tRFC=trfc, tFAW=(20, 25), tRAS=32), "2400": _SpeedgradeTimings(tRP=13.32, tRCD=13.32, tWR=15, tRFC=trfc, tFAW=(20, 25), tRAS=32),
} }
speedgrade_timings["default"] = speedgrade_timings["2400"] speedgrade_timings["default"] = speedgrade_timings["2400"]
# LPDDR4 -------------------------------------------------------------------------------------------
class MT53E256M16D1(SDRAMModule):
memtype = "LPDDR4"
nbanks = 8
nrows = 32768
ncols = 1024
technology_timings = _TechnologyTimings(tREFI=32e6/8192, tWTR=(8, 10), tCCD=(8, None), tRRD=(4, 10), tZQCS=None) # TODO: tZQCS
speedgrade_timings = {
"1866": _SpeedgradeTimings(tRP=(3, 21), tRCD=(4, 18), tWR=(4, 18), tRFC=180, tFAW=40, tRAS=(3, 42)), # TODO: tRAS_max
}
speedgrade_timings["default"] = speedgrade_timings["1866"]