init: generate `#define SDRAM_PHY_DFI_DATABITS` constant
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@ -670,6 +670,7 @@ def get_sdram_phy_c_header(phy_settings, timing_settings):
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r += "#define SDRAM_PHY_"+phytype+"\n"
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r += "#define SDRAM_PHY_"+phytype+"\n"
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r += "#define SDRAM_PHY_XDR "+str(1 if phy_settings.memtype == "SDR" else 2) + "\n"
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r += "#define SDRAM_PHY_XDR "+str(1 if phy_settings.memtype == "SDR" else 2) + "\n"
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r += "#define SDRAM_PHY_DATABITS "+str(phy_settings.databits) + "\n"
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r += "#define SDRAM_PHY_DATABITS "+str(phy_settings.databits) + "\n"
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r += "#define SDRAM_PHY_DFI_DATABITS "+str(phy_settings.dfi_databits) + "\n"
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r += "#define SDRAM_PHY_PHASES "+str(nphases)+"\n"
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r += "#define SDRAM_PHY_PHASES "+str(nphases)+"\n"
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if phy_settings.cl is not None:
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if phy_settings.cl is not None:
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r += "#define SDRAM_PHY_CL "+str(phy_settings.cl)+"\n"
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r += "#define SDRAM_PHY_CL "+str(phy_settings.cl)+"\n"
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