common/TXXDcontroller: set ready default value to 1 with self.comb instead of reset value
Fix SDRAM build with Yosys
This commit is contained in:
parent
cec35f3efd
commit
a74d5c9d9e
|
@ -165,11 +165,12 @@ def cmd_request_rw_layout(a, ba):
|
||||||
class tXXDController(Module):
|
class tXXDController(Module):
|
||||||
def __init__(self, txxd):
|
def __init__(self, txxd):
|
||||||
self.valid = valid = Signal()
|
self.valid = valid = Signal()
|
||||||
self.ready = ready = Signal(reset=1)
|
self.ready = ready = Signal()
|
||||||
ready.attr.add("no_retiming")
|
ready.attr.add("no_retiming")
|
||||||
|
|
||||||
# # #
|
# # #
|
||||||
|
|
||||||
|
self.comb += self.ready.eq(1)
|
||||||
if txxd is not None:
|
if txxd is not None:
|
||||||
count = Signal(max=max(txxd, 2))
|
count = Signal(max=max(txxd, 2))
|
||||||
self.sync += \
|
self.sync += \
|
||||||
|
|
Loading…
Reference in New Issue