bench: use --sys-clk-freq=xy to reconfigure frequency and fix Ultrascale.

This commit is contained in:
Florent Kermarrec 2020-12-10 19:06:19 +01:00
parent efb1975d00
commit a87c468afa
6 changed files with 44 additions and 15 deletions

View File

@ -133,7 +133,7 @@ def main():
parser.add_argument("--with-analyzer", action="store_true", help="Add Analyzer")
parser.add_argument("--load", action="store_true", help="Load bitstream")
parser.add_argument("--load-bios", action="store_true", help="Load BIOS")
parser.add_argument("--set-sys-clk", default=None, help="Set sys_clk")
parser.add_argument("--sys-clk-freq", default=None, help="Set sys_clk_freq")
parser.add_argument("--test", action="store_true", help="Run Full Bench")
args = parser.parse_args()
@ -149,9 +149,9 @@ def main():
from common import load_bios
load_bios("build/arty/software/bios/bios.bin")
if args.set_sys_clk is not None:
if args.sys_clk_freq is not None:
from common import s7_set_sys_clk
s7_set_sys_clk(clk_freq=float(args.config), vco_freq=soc.crg.main_pll.compute_config()["vco"])
s7_set_sys_clk(clk_freq=float(args.sys_clk_freq), vco_freq=soc.crg.main_pll.compute_config()["vco"])
if args.test:
from common import s7_bench_test

View File

@ -284,3 +284,32 @@ def us_bench_test(freq_min, freq_max, freq_step, vco_freq, bios_filename, bios_t
# # #
bus.close()
def us_set_sys_clk(clk_freq, vco_freq):
import time
from litex import RemoteClient
bus = RemoteClient()
bus.open()
# # #
# (Re)Configuring sys_clk.
print("Configuring sys_clk to {:3.3f}...".format(clk_freq/1e6))
uspll = USPLL(bus)
clkout0_clkreg1 = ClkReg1(uspll.read(0x8))
vco_div = int(vco_freq/clk_freq)
clkout0_clkreg1.high_time = vco_div//2 + vco_div%2
clkout0_clkreg1.low_time = vco_div//2
uspll.write(0x08, clkout0_clkreg1.pack())
# Measure/verify sys_clk
duration = 1
start = bus.regs.crg_sys_clk_counter.read()
time.sleep(duration)
end = bus.regs.crg_sys_clk_counter.read()
print("Measured sys_clk: {:3.2f}MHz.".format((end-start)/(1e6*duration)))
# # #
bus.close()

View File

@ -127,7 +127,7 @@ def main():
parser.add_argument("--with-analyzer", action="store_true", help="Add Analyzer")
parser.add_argument("--load", action="store_true", help="Load bitstream")
parser.add_argument("--load-bios", action="store_true", help="Load BIOS")
parser.add_argument("--set-sys-clk", default=None, help="Set sys_clk")
parser.add_argument("--sys-clk-freq", default=None, help="Set sys_clk_freq")
parser.add_argument("--test", action="store_true", help="Run Full Bench")
args = parser.parse_args()
@ -143,9 +143,9 @@ def main():
from common import load_bios
load_bios("build/genesys2/software/bios/bios.bin")
if args.set_sys_clk is not None:
if args.sys_clk_freq is not None:
from common import s7_set_sys_clk
s7_set_sys_clk(clk_freq=float(args.config), vco_freq=soc.crg.main_pll.compute_config()["vco"])
s7_set_sys_clk(clk_freq=float(args.sys_clk_freq), vco_freq=soc.crg.main_pll.compute_config()["vco"])
if args.test:
from common import s7_bench_test

View File

@ -127,7 +127,7 @@ def main():
parser.add_argument("--with-analyzer", action="store_true", help="Add Analyzer")
parser.add_argument("--load", action="store_true", help="Load bitstream")
parser.add_argument("--load-bios", action="store_true", help="Load BIOS")
parser.add_argument("--set-sys-clk", default=None, help="Set sys_clk")
parser.add_argument("--sys-clk-freq", default=None, help="Set sys_clk_freq")
parser.add_argument("--test", action="store_true", help="Run Full Bench")
args = parser.parse_args()
@ -143,9 +143,9 @@ def main():
from common import load_bios
load_bios("build/kc705/software/bios/bios.bin")
if args.set_sys_clk is not None:
if args.sys_clk_freq is not None:
from common import us_set_sys_clk
us_set_sys_clk(clk_freq=float(args.config), vco_freq=soc.crg.main_pll.compute_config()["vco"])
us_set_sys_clk(clk_freq=float(args.sys_clk_freq), vco_freq=soc.crg.main_pll.compute_config()["vco"])
if args.test:
from common import s7_bench_test

View File

@ -148,7 +148,7 @@ def main():
parser.add_argument("--with-analyzer", action="store_true", help="Add Analyzer")
parser.add_argument("--load", action="store_true", help="Load bitstream")
parser.add_argument("--load-bios", action="store_true", help="Load BIOS")
parser.add_argument("--set-sys-clk", default=None, help="Set sys_clk")
parser.add_argument("--sys-clk-freq", default=None, help="Set sys_clk_freq")
parser.add_argument("--test", action="store_true", help="Run Full Bench")
args = parser.parse_args()
@ -164,9 +164,9 @@ def main():
from common import load_bios
load_bios("build/kcu105/software/bios/bios.bin")
if args.set_sys_clk is not None:
if args.sys_clk_freq is not None:
from common import us_set_sys_clk
us_set_sys_clk(clk_freq=float(args.config), vco_freq=soc.crg.main_pll.compute_config()["vco"])
us_set_sys_clk(clk_freq=float(args.sys_clk_freq), vco_freq=soc.crg.main_pll.compute_config()["vco"])
if args.test:
from common import us_bench_test

View File

@ -138,7 +138,7 @@ def main():
parser.add_argument("--with-analyzer", action="store_true", help="Add Analyzer")
parser.add_argument("--load", action="store_true", help="Load bitstream")
parser.add_argument("--load-bios", action="store_true", help="Load BIOS")
parser.add_argument("--set-sys-clk", default=None, help="Set sys_clk")
parser.add_argument("--sys-clk-freq", default=None, help="Set sys_clk_freq")
parser.add_argument("--test", action="store_true", help="Run Full Bench")
args = parser.parse_args()
@ -154,9 +154,9 @@ def main():
from common import load_bios
load_bios("build/xcu1525/software/bios/bios.bin")
if args.set_sys_clk is not None:
if args.sys_clk_freq is not None:
from common import us_set_sys_clk
us_set_sys_clk(clk_freq=float(args.config), vco_freq=soc.crg.main_pll.compute_config()["vco"])
us_set_sys_clk(clk_freq=float(args.sys_clk_freq), vco_freq=soc.crg.main_pll.compute_config()["vco"])
if args.test:
from common import us_bench_test