test: update ddr3 and ddr4 reference headers to new MR_WLVL defines
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@ -70,7 +70,9 @@ const unsigned long sdram_dfii_pix_rddata_addr[SDRAM_PHY_PHASES] = {
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CSR_SDRAM_DFII_PI3_RDDATA_ADDR
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};
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#define DDRX_MR1 6
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#define DDRX_MR_WRLVL_ADDRESS 1
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#define DDRX_MR_WRLVL_RESET 6
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#define DDRX_MR_WRLVL_BIT 7
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static void init_sequence(void)
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{
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@ -71,7 +71,9 @@ const unsigned long sdram_dfii_pix_rddata_addr[SDRAM_PHY_PHASES] = {
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CSR_SDRAM_DFII_PI3_RDDATA_ADDR
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};
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#define DDRX_MR1 769
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#define DDRX_MR_WRLVL_ADDRESS 1
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#define DDRX_MR_WRLVL_RESET 769
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#define DDRX_MR_WRLVL_BIT 7
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static void init_sequence(void)
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{
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