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examples/versa_ecp5.yml: enable CPU (required for DDR3 calibration), update copyright

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Florent Kermarrec 2020-01-27 18:30:24 +01:00
parent bb683a69ea
commit e5e4f528d4
1 changed files with 3 additions and 3 deletions
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examples/versa_ecp5.yml
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@ -1,10 +1,10 @@
# This file is Copyright (c) 2018-2019 Florent Kermarrec <florent@enjoy-digital.fr>
# This file is Copyright (c) 2020 Stefan Schrijvers <ximin@ximinity.net>
# License: BSD
{
# General ------------------------------------------------------------------
"cpu": None, # Type of CPU used for init/calib (vexriscv, lm32)
"memtype": "DDR3", # DRAM type
"cpu": "vexriscv", # Type of CPU used for init/calib (vexriscv, lm32)
"memtype": "DDR3", # DRAM type
# PHY ----------------------------------------------------------------------
"sdram_module": "MT41K64M16", # SDRAM modules of the board or SO-DIMM