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frontend/dma: add description of fifo_buffered parameter

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This commit is contained in:
Florent Kermarrec 2018-01-31 09:32:21 +01:00
parent 13d41f67ab
commit ec9ad2fc39
1 changed files with 2 additions and 2 deletions
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4
litedram/frontend/dma.py
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@ -21,7 +21,7 @@ class LiteDRAMDMAReader(Module):
read requests can be outstanding at once).
fifo_buffered : bool
???
Implement FIFO in Block Ram.
Attributes
----------
@ -88,7 +88,7 @@ class LiteDRAMDMAWriter(Module):
requests can be outstanding at once).
fifo_buffered : bool
???
Implement FIFO in Block Ram.
Attributes
----------