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frontend/dma: simplify rsv_level expose

This commit is contained in:
Florent Kermarrec 2019-07-05 11:30:57 +02:00
parent 88835de734
commit fc41751080
1 changed files with 4 additions and 4 deletions
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8
litedram/frontend/dma.py
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@ -77,15 +77,15 @@ class LiteDRAMDMAReader(Module):
# incremented when data is planned to be queued
# decremented when data is dequeued
data_dequeued = Signal()
self.rsv_level = Signal(max=fifo_depth+1)
self.rsv_level = rsv_level = Signal(max=fifo_depth+1)
self.sync += [
If(request_issued,
If(~data_dequeued, self.rsv_level.eq(self.rsv_level + 1))
If(~data_dequeued, rsv_level.eq(self.rsv_level + 1))
).Elif(data_dequeued,
self.rsv_level.eq(self.rsv_level - 1)
rsv_level.eq(rsv_level - 1)
)
]
self.comb += request_enable.eq(self.rsv_level != fifo_depth)
self.comb += request_enable.eq(rsv_level != fifo_depth)
# FIFO
fifo = stream.SyncFIFO([("data", port.data_width)], fifo_depth, fifo_buffered)