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litedram_gen: Fix error with --sim option 

It looks like commit 317072a198 ("litedram_gen: Add initial SDRAM
support (with ULX3S example)") broke building with the --sim option.
This commit is contained in:
Anton Blanchard 2021-08-09 10:35:17 +10:00
parent ae139096c0
commit fe1bb083ef
1 changed files with 1 additions and 1 deletions
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2
litedram/gen.py
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@ -501,7 +501,7 @@ class LiteDRAMCore(SoCCore):
memtype = sdram_module.memtype, memtype = sdram_module.memtype,
data_width = core_config["sdram_module_nb"]*8, data_width = core_config["sdram_module_nb"]*8,
clk_freq = sdram_clk_freq) clk_freq = sdram_clk_freq)
self.submodules.ddrphy = SDRAMPHYModel( self.submodules.ddrphy = sdram_phy = SDRAMPHYModel(
module = sdram_module, module = sdram_module,
settings = phy_settings, settings = phy_settings,
clk_freq = sdram_clk_freq) clk_freq = sdram_clk_freq)