Florent Kermarrec
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e0e204a514
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litedram_gen: Add FIFO Mode to UART (and rename serial IOs to uart).
It's more interesting in some design to access the UART through a FIFO like
interface than through RS232.
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2021-09-16 17:01:00 +02:00 |
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Florent Kermarrec
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a11d1b870d
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litedram_gen: Remove device limitation on GENSDRPHY/ECP5DDRPHY.
By specifying FPGA device in .yml files for configs requiring it.
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2021-07-02 09:15:42 +02:00 |
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Florent Kermarrec
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ac825e5112
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add SPDX License identifier to header and specify file is part of LiteDRAM.
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2020-08-23 15:52:08 +02:00 |
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Florent Kermarrec
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4e62d28af6
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examples/.yml: set cmd_latency to 1 on Kintex7/Ultrascale (values valided in LiteX-Boards).
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2020-08-06 11:52:34 +02:00 |
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Florent Kermarrec
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992f80c68b
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litedram_gen: add Ultrascale(+) support and KCU105 config file, remove cmd_delay on 7-series (not automatically calibrated).
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2020-06-03 09:35:40 +02:00 |