Jędrzej Boczar e5179eb9ab gen: fix LiteDRAMFIFO parameters		2020-06-03 17:39:45 +02:00
..
core	core/crossbar: remove retro-compat > 6 months old.	2020-05-18 18:51:56 +02:00
frontend	frontend/fifo: increase FIFO level after data has actually been written	2020-06-03 16:13:28 +02:00
phy	phy/model: Don't generate empty mem_*.init files	2020-05-22 18:09:11 +10:00
__init__.py	update code, start bankmachine refactoring and remove old code (will be rewritten)	2015-09-15 10:22:39 +02:00
common.py	test/test_timing: update test_txxd_controller.	2020-05-20 23:40:01 +02:00
dfii.py	dfii: simplify control using CSRFields.	2020-06-02 16:31:33 +02:00
gen.py	gen: fix LiteDRAMFIFO parameters	2020-06-03 17:39:45 +02:00
init.py	test/reference: update.	2020-05-19 08:16:11 +02:00
modules.py	modules/spd: save SPD data in SDRAMModule to allow for runtime verification	2020-06-01 16:56:41 +02:00