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litedram/test
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Jędrzej Boczar baf9c07858 phy/utils: improve ConstBitSlip: 
* optional register=False to decrease latency by 1 cycle
* require explicit `cycles` as it influences latency (min_cycles
  still can be used)
* add unit tests
 		2021-06-21 14:43:49 +02:00
..
primitives test: add minimal OSERDESE2/OSERDESE3 simulations to check Data/Tristate latencies. 2020-10-02 12:30:19 +02:00
reference also remove 'static' from cdelay() declarations in test suite 2021-05-26 12:09:26 -04:00
spd_data test/spd_data: add missing files to tracking 2020-06-02 15:19:53 +02:00
summary test: fix wrong sorting in benchmarks summary 2020-02-20 09:20:38 +01:00
__init__.py update code, start bankmachine refactoring and remove old code (will be rewritten) 2015-09-15 10:22:39 +02:00
access_pattern.csv test: add new benchmark configuratiosns to example configuration file 2020-02-05 18:58:49 +01:00
benchmark.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
benchmarks.yml test: update benchmark configuration generator 2020-02-12 15:42:50 +01:00
common.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
gen_access_pattern.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
gen_config.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
phy_common.py test/lpddr4: move run_simulation wrapper to phy_common.py 2021-06-21 14:43:49 +02:00
run_benchmarks.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_adaptation.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_adapter.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_axi.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_bandwidth.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_bankmachine.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_bist.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_command_chooser.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_crossbar.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_dma.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_ecc.py test/test_ecc: Update. 2021-06-08 15:07:39 +02:00
test_examples.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_fifo.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_init.py test/test_init: Add simple way to update references. 2021-05-18 11:26:19 +02:00
test_lpddr4.py test/lpddr4: move run_simulation wrapper to phy_common.py 2021-06-21 14:43:49 +02:00
test_modules.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_multiplexer.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_phy_utils.py phy/utils: improve ConstBitSlip: 2021-06-21 14:43:49 +02:00
test_refresh.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_steerer.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_timing.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
test_wishbone.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00