gruetzkopf fe2cc948dc modules: Add support for Micron MT47H32M16 DDR2 RAM		2019-08-31 12:05:07 +02:00
..
core	core/refresher: set cmd.valid to 0 when sequencer done	2019-08-30 08:55:38 +02:00
frontend	frontend/ecc: move generic part of ECC to LiteX	2019-07-13 11:47:13 +02:00
phy	phy/gensdrphy: add assertions on length of pads.dq/pads.dq	2019-08-04 15:06:34 +02:00
__init__.py	update code, start bankmachine refactoring and remove old code (will be rewritten)	2015-09-15 10:22:39 +02:00
common.py	core: move timing controllers to common	2019-07-23 12:39:14 +02:00
dfii.py	add CONTRIBUTORS file and add copyright header to all files.	2019-06-23 23:59:10 +02:00
gen.py	litedram/gen: add description and switch to argparse	2019-08-28 08:07:20 +02:00
modules.py	modules: Add support for Micron MT47H32M16 DDR2 RAM	2019-08-31 12:05:07 +02:00
sdram_init.py	add CONTRIBUTORS file and add copyright header to all files.	2019-06-23 23:59:10 +02:00