core/arp: Simplify IDLE state.
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@ -44,10 +44,8 @@ class LiteEthARPTX(Module):
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self.submodules.fsm = fsm = FSM(reset_state="IDLE")
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self.submodules.fsm = fsm = FSM(reset_state="IDLE")
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fsm.act("IDLE",
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fsm.act("IDLE",
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sink.ready.eq(1),
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NextValue(counter, 0),
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NextValue(counter, 0),
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If(sink.valid,
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If(sink.valid,
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sink.ready.eq(0),
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NextState("SEND")
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NextState("SEND")
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)
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)
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)
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)
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