Hardware
/
liteeth
mirror of https://github.com/enjoy-digital/liteeth.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

mac/core: Disable Preamble/CRC with LiteEthPHYModel.

This commit is contained in:
Florent Kermarrec 2021-10-05 15:41:44 +02:00
parent 5276a7543f
commit 8ecc3ca6d9
1 changed files with 2 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
liteeth/mac/core.py
View File

@ -32,7 +32,6 @@ class LiteEthMACCore(Module, AutoCSR):
phy_dw = phy.dw phy_dw = phy.dw
if core_dw < phy_dw: if core_dw < phy_dw:
raise ValueError("Core data width({}) must be larger than PHY data width({})".format(core_dw, phy_dw)) raise ValueError("Core data width({}) must be larger than PHY data width({})".format(core_dw, phy_dw))
if with_sys_datapath: if with_sys_datapath:
cd_tx = "sys" cd_tx = "sys"
cd_rx = "sys" cd_rx = "sys"
@ -41,6 +40,8 @@ class LiteEthMACCore(Module, AutoCSR):
cd_tx = "eth_tx" cd_tx = "eth_tx"
cd_rx = "eth_rx" cd_rx = "eth_rx"
datapath_dw = phy_dw datapath_dw = phy_dw
if isinstance(phy, LiteEthPHYModel):
with_preamble_crc = False # Disable Preamble/CRC with PHY Model for direct connection to the Ethernet tap.
# CSRs. # CSRs.
if with_preamble_crc: if with_preamble_crc: