liteeth/gen: Revert and fix missing Wishbone interface.
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@ -242,6 +242,11 @@ class MACCore(PHYCore):
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full_memory_we = core_config.get("full_memory_we", False))
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# Wishbone Interface -----------------------------------------------------------------------
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wb_bus = wishbone.Interface()
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platform.add_extension(wb_bus.get_ios("wishbone"))
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self.comb += wb_bus.connect_to_pads(self.platform.request("wishbone"), mode="slave")
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self.add_wb_master(wb_bus)
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ethmac_region_size = (nrxslots + ntxslots)*buffer_depth
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ethmac_region = SoCRegion(origin=self.mem_map.get("ethmac", None), size=ethmac_region_size, cached=False)
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self.bus.add_slave(name="ethmac", slave=ethmac.bus, region=ethmac_region)
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