Hardware/liteeth
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4 commits

Author SHA1 Message Date
Xiretza
7a44209f77
Make memory/CSR regions customizable in config 
Also remove interrupt mapping, since it's unused without a CPU anyway.
 2020-02-12 15:55:04 +01:00
Xiretza
ca9cbd1555
Move more options to config file 2020-02-12 15:55:04 +01:00
Florent Kermarrec
358bc23cd4 examples/.ymls: add separators 2020-02-12 11:23:33 +01:00
Florent Kermarrec
fcadd60cea liteeth/gen: initial switch to YAML config file (similar to LiteDRAM/LitePCIe) 2020-02-12 00:18:22 +01:00