2 Commits

Author	SHA1	Message	Date
Florent Kermarrec	2c67d13456	examples: Improve identation/presentation.	2024-03-18 13:43:11 +01:00
Victor Suarez Rovere	5f14bd4a7f	add initial support to generate verilog code using wishbone or axi-lite bus standard (depending on the .yml file)	2022-10-31 20:43:53 -03:00