liteeth/bench
Vamsi Vytla 65cef14574 Add VLAN (802.1q) tag support for all datawidths of LiteethMAC
A working ping and UDP on both HW and sim on verilator tun/tap over 2 VLAN tags and IPs.
See bench/sim_xgmii_vlan.py

Currently adding a VLAN tag sets up a new port on a newly added MACVLANCrossbar, with a new IP in that virtual network. This can be modded in the future upon necessity and add more IP addresses within the network.

common.py: Add vlan header related things
core/__init__.py: Adds a separate instantiator for VLANs LiteEthVLANUDPIPCore
core/{arp/ip}.py: Facilitate the necessary VLAN related modifications
mac/common.py: Update the get_port method of the crossbar to support a fancier dispatcher
liteeth/packet.py: VLAN header is 4 bytes, this is smaller than 8 byte dw of xgmii, so necessary changes to handle packet headers that are less than datawidth are in here. Note that header_words == 0 codepath is basically independent from the previous code, and the new packet.py is backwards compatible.
2023-05-24 13:56:31 -07:00
..
arty.py bench: Use full imports. 2022-05-02 13:09:28 +02:00
butterstick.py bench/butterstick: Add JTAGBone and Analyzer in MAC/ARP/IP/UDP/Etherbone control path. 2022-04-25 15:38:55 +02:00
colorlight_5a_75b.py bench: Update (remove calls to add_csr no longer required). 2021-07-02 09:34:33 +02:00
genesys2.py bench: Use full imports. 2022-05-02 13:09:28 +02:00
kcu105.py bench: Use full imports. 2022-05-02 13:09:28 +02:00
sim.py bench: Update (remove calls to add_csr no longer required). 2021-07-02 09:34:33 +02:00
sim_xgmii_vlan.py Add VLAN (802.1q) tag support for all datawidths of LiteethMAC 2023-05-24 13:56:31 -07:00
test_etherbone.py bench/test_etherbone/speed_test: use burst_size of 255. 2020-11-26 11:36:12 +01:00
test_udp_streamer.py bench/arty:bench/arty: Add UDP Streamer example with UDP TX stream from Switches. 2021-09-22 18:21:20 +02:00
xcu1525.py bench: Use full imports. 2022-05-02 13:09:28 +02:00