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liteeth
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1fefe49e74
liteeth
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liteeth
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Florent Kermarrec
dd2ecfefd8
liteeth/phy: Add USP_GTY_2500BASEX support.
2024-01-23 15:55:25 +01:00
..
core
core/__init__: LiteEthUDPIPCore, LiteEthIPCore: expose interface & endianness at LiteEthUDPIPCore constructor. LiteEthIPCore: don't hardcode interface, pass macaddr and endianness to LiteEthMAC
2023-10-23 16:18:28 +02:00
frontend
frontend/stream/LiteEthStream2UDPTX: Latch ip_address/udp_port in Idle state.
2023-07-18 16:38:13 +02:00
mac
mac/sram: Minor cleanup by directly using port instead of ports[n] in the loop.
2023-10-10 14:55:26 +02:00
phy
liteeth/phy: Add USP_GTY_2500BASEX support.
2024-01-23 15:55:25 +01:00
software
software/dissector: merge bit.lua/etherbone.lua in a single script and enable dissector on UDP port 1234 (LiteX's default).
2020-11-24 19:40:18 +01:00
__init__.py
init repo
2015-09-07 13:29:34 +02:00
common.py
core/icmp/LiteEthICMPEcho: Verify packet length before storing in buffer and drop if too long for configurated depth.
2023-07-10 11:13:52 +02:00
crossbar.py
crossbar: Switch to LiteXModule.
2023-07-10 09:53:45 +02:00
gen.py
liteeth/phy: Add USP_GTY_2500BASEX support.
2024-01-23 15:55:25 +01:00
packet.py
packet: Switch to LiteX/Module.
2023-07-10 10:24:37 +02:00