liteeth/liteeth
Florent Kermarrec 7537dcb0fc phy/100basex: Rename crg_reset to reset. 2023-07-10 12:58:55 +02:00
..
core core/icmp/LiteEthICMPEcho: Verify packet length before storing in buffer and drop if too long for configurated depth. 2023-07-10 11:13:52 +02:00
frontend frontend/etherbone: Switch to LiteXModule. 2023-07-10 10:37:00 +02:00
mac global: Switch to litex.gen.genlib.misc. 2023-07-06 22:06:37 +02:00
phy phy/100basex: Rename crg_reset to reset. 2023-07-10 12:58:55 +02:00
software software/dissector: merge bit.lua/etherbone.lua in a single script and enable dissector on UDP port 1234 (LiteX's default). 2020-11-24 19:40:18 +01:00
__init__.py init repo 2015-09-07 13:29:34 +02:00
common.py core/icmp/LiteEthICMPEcho: Verify packet length before storing in buffer and drop if too long for configurated depth. 2023-07-10 11:13:52 +02:00
crossbar.py crossbar: Switch to LiteXModule. 2023-07-10 09:53:45 +02:00
gen.py liteeth_gen: Switch to LiteXModule and remove old TODO. 2023-07-03 19:15:12 +02:00
packet.py packet: Switch to LiteX/Module. 2023-07-10 10:24:37 +02:00