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liteeth
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ca9cbd1555
liteeth
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liteeth
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Xiretza
ca9cbd1555
Move more options to config file
2020-02-12 15:55:04 +01:00
..
core
A few minor changes that help RGMII phy related debugging. {s6, s7, us}rgmii.py Make dw a class variable instead
2020-01-17 09:23:03 -08:00
frontend
global: keep up to date with LiteX (update stream_packet import to packet)
2019-11-21 11:01:50 +01:00
mac
mac/sram: simplify code and improve SRAM read speed using async_read on Memory.
2020-02-07 11:40:14 +01:00
phy
liteeth/gen: initial switch to YAML config file (similar to LiteDRAM/LitePCIe)
2020-02-12 00:18:22 +01:00
software
liteeth/software: remove libwip/libuip examples.
2019-06-17 21:17:52 +02:00
__init__.py
init repo
2015-09-07 13:29:34 +02:00
common.py
global: keep up to date with LiteX (update stream_packet import to packet)
2019-11-21 11:01:50 +01:00
crossbar.py
global: pass data_width(dw) parameter to modules to prepare for 10Gbps/25Gbps links
2019-11-21 11:01:55 +01:00
gen.py
Move more options to config file
2020-02-12 15:55:04 +01:00