Florent Kermarrec 8e1185711b common: remove Port.connect and use 2 separate Record.connect.		2020-06-22 14:36:44 +02:00
..
targets	common: remove Port.connect and use 2 separate Record.connect.	2020-06-22 14:36:44 +02:00
test	examples: use integrated sram instead of external one. (Also fix regression with new SoC that no longer support address decoders passed to add_wb_slave)	2020-02-11 21:22:13 +01:00
__init__.py	README: update and rename example_designs to examples	2018-08-31 08:26:37 +02:00
make.py	examples: keep up to date with LiteX	2019-11-23 15:23:24 +01:00
udp_s7phyrgmii.yml	examples: increase clk_freq to 125MHz on udp_s7phyrgmii.yml.	2020-03-19 22:01:33 +01:00
wishbone_mii.yml	Allow changing all SoC options through YAML config	2020-03-17 18:52:44 +01:00