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Small footprint and configurable Ethernet core
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Leon Schuermann e6a4c2a2f6 mac/sram: support data widths larger than 32 bit 
This removes various assumptions about having a 32 bit data width in
the SRAM module. Especially the last_be encoding and decoding have
been seperated into a module, which generates the one-hot encodings
and decodings on the fly.

Signed-off-by: Leon Schuermann <leon@is.currently.online>
 		2021-09-27 08:26:06 +02:00
.github/workflows ci: migrate from Travis-CI to Github Actions. 2020-11-24 13:36:06 +01:00
bench bench: Add XCU1525 bench (compiles but not yet working on hardware). 2021-07-02 13:00:43 +02:00
doc doc: add simple architecture diagram 2017-11-13 17:39:09 +01:00
examples examples: remove old examples and update README (new benches/examples will be added). 2020-11-23 12:54:09 +01:00
liteeth mac/sram: support data widths larger than 32 bit 2021-09-27 08:26:06 +02:00
test Fix "is not" literal SyntaxWarning 2021-02-16 21:57:53 +10:30
.gitignore uniformize litex cores 2018-02-22 10:12:33 +01:00
CONTRIBUTORS examples: add practical UDP loopback example with Versa ECP5 2019-11-20 08:18:50 +01:00
LICENSE uniformize litex cores 2018-02-22 10:12:33 +01:00
README.md ci: migrate from Travis-CI to Github Actions. 2020-11-24 13:36:06 +01:00
setup.py setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. 2020-04-07 11:54:31 +02:00

README.md 

                                      __   _ __      ______  __
                                     / /  (_) /____ / __/ /_/ /
                                    / /__/ / __/ -_) _// __/ _ \
                                   /____/_/\__/\__/___/\__/_//_/

                                 Copyright 2012-2020 / EnjoyDigital

                             A small footprint and configurable Ethernet core
                                      powered by Migen & LiteX

License

[> Intro

LiteEth provides a small footprint and configurable Ethernet core.

LiteEth is part of LiteX libraries whose aims are to lower entry level of complex FPGA cores by providing simple, elegant and efficient implementations of components used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller...

Using Migen to describe the HDL allows the core to be highly and easily configurable.

LiteEth can be used as LiteX library or can be integrated with your standard design flow by generating the verilog rtl that you will use as a standard core.

[> Features

PHY:

  • MII, RMII 100Mbps PHYs.
  • GMII / RGMII /1000BaseX 1Gbps PHYs.

Core:

  • Configurable MAC (HW or SW interface)
  • ARP / ICMP / UDP (HW or SW)

Frontend:

  • Etherbone (Wishbone over UDP: Slave or Master support)

[> FPGA Proven

LiteEth is already used in commercial and open-source designs:

[> Possible improvements

  • add standardized interfaces (AXI, Avalon-ST)
  • add DMA interface to MAC
  • add more documentation
  • ... See below Support and consulting :)

If you want to support these features, please contact us at florent [AT] enjoy-digital.fr.

[> Getting started

  1. Install Python 3.6+ and FPGA vendor's development tools.
  2. Install LiteX and the cores by following the LiteX's wiki installation guide.
  3. You can find examples of integration of the core with LiteX in LiteX-Boards and in the examples directory.

[> Tests

Unit tests are available in ./test/. To run all the unit tests:

$ ./setup.py test

Tests can also be run individually:

$ python3 -m unittest test.test_name

[> License

LiteEth is released under the very permissive two-clause BSD license. Under the terms of this license, you are authorized to use LiteEth for closed-source proprietary designs. Even though we do not require you to do so, those things are awesome, so please do them if possible:

  • tell us that you are using LiteEth
  • cite LiteEth in publications related to research it has helped
  • send us feedback and suggestions for improvements
  • send us bug reports when something goes wrong
  • send us the modifications and improvements you have done to LiteEth.

[> Support and consulting

We love open-source hardware and like sharing our designs with others.

LiteEth is developed and maintained by EnjoyDigital.

If you would like to know more about LiteEth or if you are already a happy user and would like to extend it for your needs, EnjoyDigital can provide standard commercial support as well as consulting services.

So feel free to contact us, we'd love to work with you! (and eventually shorten the list of the possible improvements :)

[> Contact

E-mail: florent [AT] enjoy-digital.fr