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Use cpu instead of cpu_or_bridge in examples

This commit is contained in:
Arnaud Durand 2019-08-20 13:55:00 +02:00
parent 9e3b9d84ce
commit 06cac3a142
2 changed files with 2 additions and 2 deletions
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2
examples/targets/core.py
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@ -56,7 +56,7 @@ class Core(SoCCore):
with_timer=False
)
self.add_cpu_or_bridge(UARTWishboneBridge(platform.request("serial"), clk_freq, baudrate=115200))
self.add_wb_master(self.cpu_or_bridge.wishbone)
self.add_wb_master(self.cpu.wishbone)
self.bus = platform.request("bus")
self.submodules.analyzer = LiteScopeAnalyzer((self.bus), 512)

2
examples/targets/simple.py
View File

@ -32,7 +32,7 @@ class LiteScopeSoC(SoCCore):
# bridge
self.add_cpu_or_bridge(UARTWishboneBridge(platform.request("serial"),
sys_clk_freq, baudrate=115200))
self.add_wb_master(self.cpu_or_bridge.wishbone)
self.add_wb_master(self.cpu.wishbone)
# Litescope IO
self.submodules.io = LiteScopeIO(8)