core: add full flag for trigger memory

This commit is contained in:
Florent Kermarrec 2018-05-28 19:41:44 +02:00
parent c0bab06765
commit 65b7f08cbc
1 changed files with 3 additions and 1 deletions

View File

@ -38,6 +38,7 @@ class FrontendTrigger(Module, AutoCSR):
self.mem_write = CSR() self.mem_write = CSR()
self.mem_mask = CSRStorage(dw) self.mem_mask = CSRStorage(dw)
self.mem_value = CSRStorage(dw) self.mem_value = CSRStorage(dw)
self.mem_full = CSRStatus()
# # # # # #
@ -58,7 +59,8 @@ class FrontendTrigger(Module, AutoCSR):
self.comb += [ self.comb += [
mem.sink.valid.eq(self.mem_write.re), mem.sink.valid.eq(self.mem_write.re),
mem.sink.mask.eq(self.mem_mask.storage), mem.sink.mask.eq(self.mem_mask.storage),
mem.sink.value.eq(self.mem_value.storage) mem.sink.value.eq(self.mem_value.storage),
self.mem_full.status.eq(~mem.sink.ready)
] ]
# hit and memory read/flush # hit and memory read/flush