example_designs: use new Vivado special overrides

2016-03-16 19:48:38 +01:00 · 2016-03-16 19:48:38 +01:00 · 7af786e47e
parent 6d975fe388
commit 7af786e47e
2 changed files with 4 additions and 2 deletions
--- a/example_designs/make.py
+++ b/example_designs/make.py
@ -168,8 +168,8 @@ RLE: {}
        soc_fragment = soc.get_fragment()
        platform.finalize(soc_fragment)
        so = {
-            NoRetiming:             XilinxNoRetiming,
-            MultiReg:               XilinxMultiReg,
+            NoRetiming:             XilinxNoRetimingVivado,
+            MultiReg:               XilinxMultiRegVivado,
            AsyncResetSynchronizer: XilinxAsyncResetSynchronizer
        }
        v_output = platform.get_verilog(soc_fragment, name="litescope", special_overrides=so)
--- a/test/Makefile
+++ b/test/Makefile
@ -11,5 +11,7 @@ example_designs:
 	cd ../example_designs && $(PYTHON) make.py -t simple -p kc705 -Ob run False build-bitstream
 	cd ../example_designs && $(PYTHON) make.py -t core build-core

+all: dump_tb example_designs
+
 clean:
 	rm -f dump.*