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example_designs/targets/core: use new Pins from LiteX (allow int parameters)

This commit is contained in:
Florent Kermarrec 2015-11-19 15:00:18 +01:00
parent 577d83dc80
commit 92c7af04db
1 changed files with 5 additions and 5 deletions
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10
example_designs/targets/core.py
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@ -15,13 +15,13 @@ from litescope.frontend.logic_analyzer import LiteScopeLogicAnalyzer
_io = [ _io = [
("sys_clk", 0, Pins("X")), ("sys_clk", 0, Pins(1)),
("sys_rst", 1, Pins("X")), ("sys_rst", 1, Pins(1)),
("serial", 0, ("serial", 0,
Subsignal("tx", Pins("X")), Subsignal("tx", Pins(1)),
Subsignal("rx", Pins("X")), Subsignal("rx", Pins(1)),
), ),
("bus", 0, Pins(" ".join(["X" for i in range(128)]))) ("bus", 0, Pins(128))
] ]
class CorePlatform(XilinxPlatform): class CorePlatform(XilinxPlatform):