Florent Kermarrec 4f03da20ab frontend/logic_analyzer: add Converter for the cases where clk_domain frequency > system frequency		2016-03-30 20:22:42 +02:00
..
core	global: use valid/ready/last signals instead of stb/ack/eop (similar to AXI)	2016-03-16 20:10:09 +01:00
frontend	frontend/logic_analyzer: add Converter for the cases where clk_domain frequency > system frequency	2016-03-30 20:22:42 +02:00
software	frontend/logic_analyzer: add Converter for the cases where clk_domain frequency > system frequency	2016-03-30 20:22:42 +02:00
__init__.py	init repo	2015-09-09 08:24:08 +02:00
common.py	common: remove direction in layout	2016-03-30 20:21:21 +02:00