1bitsquared_icebreaker_bitsy: Also switch to LiteSPI.

This commit is contained in:
Florent Kermarrec 2021-07-27 19:27:28 +02:00
parent 959780f372
commit 15b5aec23f
2 changed files with 4 additions and 2 deletions

View file

@ -95,7 +95,6 @@ class BaseSoC(SoCCore):
self.submodules.spram = Up5kSPRAM(size=128*kB)
self.bus.add_slave("sram", self.spram.bus, SoCRegion(size=128*kB))
# SPI Flash --------------------------------------------------------------------------------
from litespi.modules import W25Q128JV
from litespi.opcodes import SpiNorFlashOpCodes as Codes

View file

@ -91,7 +91,10 @@ class BaseSoC(SoCCore):
self.bus.add_slave("sram", self.spram.bus, SoCRegion(size=128*kB))
# SPI Flash --------------------------------------------------------------------------------
self.add_spi_flash(mode="1x", dummy_cycles=8)
from litespi.modules import W25Q128JV
from litespi.opcodes import SpiNorFlashOpCodes as Codes
self.add_spi_flash(mode="4x", module=W25Q128JV(Codes.READ_1_1_4), with_master=False)
#self.add_spi_flash(mode="1x", dummy_cycles=8) # LiteX SPI Flash Core.
# Add ROM linker region --------------------------------------------------------------------
self.bus.add_region("rom", SoCRegion(