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platforms/fpc_iii: avoid using dummy pin on odt. 

Now possible with 2f5784432d.
This commit is contained in:
Florent Kermarrec 2021-01-29 09:30:54 +01:00
parent 3deeb69531
commit 19767e1a2a
1 changed files with 1 additions and 1 deletions
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litex_boards/platforms/fpc_iii.py
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@ -101,7 +101,7 @@ _io = [
Misc("DIFFRESISTOR=100")), Misc("DIFFRESISTOR=100")),
Subsignal("clk_p" , Pins("K16"), IOStandard("SSTL15D_I")), Subsignal("clk_p" , Pins("K16"), IOStandard("SSTL15D_I")),
Subsignal("cke", Pins("D19"), IOStandard("SSTL15_I")), Subsignal("cke", Pins("D19"), IOStandard("SSTL15_I")),
Subsignal("odt", Pins("H4")), # FIXME not connected #Subsignal("odt", Pins("")), Not connected.
Subsignal("reset_n", Pins("L20"), IOStandard("SSTL15_I")), Subsignal("reset_n", Pins("L20"), IOStandard("SSTL15_I")),
# Pseudo-VCCIO pads: SSTL15_II for 10 mA drive strength, see FPGA-TN-02035, section 6.7. # Pseudo-VCCIO pads: SSTL15_II for 10 mA drive strength, see FPGA-TN-02035, section 6.7.
Subsignal( "vccio", Pins( "C20 E16 J18 K18 L18 L19 N17 N18 T16" ), Subsignal( "vccio", Pins( "C20 E16 J18 K18 L18 L19 N17 N18 T16" ),