enclustra_mercury_kx2: remove useless clk100, because it is not connected to a clock pin
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@ -12,7 +12,6 @@ from litex.build.openocd import OpenOCD
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_io = [
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# Clk / Rst
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("clk100", 0, Pins("AD24"), IOStandard("LVCMOS18")),
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("clk200", 0,
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Subsignal("p", Pins("AB11"), IOStandard("LVDS")),
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Subsignal("n", Pins("AC11"), IOStandard("LVDS"))
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@ -114,5 +113,4 @@ class Platform(XilinxPlatform):
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def do_finalize(self, fragment):
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XilinxPlatform.do_finalize(self, fragment)
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self.add_period_constraint(self.lookup_request("clk200", loose=True), 1e9/200e6)
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self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6)
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self.add_period_constraint(self.lookup_request("clk200", loose=True), 1e9/200e6)
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