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enclustra_mercury_kx2: remove useless clk100, because it is not connected to a clock pin

This commit is contained in:
Hans Baier 2022-05-20 04:42:06 +07:00
parent f1e021cbbe
commit 2214c7baec
1 changed files with 1 additions and 3 deletions
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4
litex_boards/platforms/enclustra_mercury_kx2.py
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@ -12,7 +12,6 @@ from litex.build.openocd import OpenOCD
_io = [ _io = [
# Clk / Rst # Clk / Rst
("clk100", 0, Pins("AD24"), IOStandard("LVCMOS18")),
("clk200", 0, ("clk200", 0,
Subsignal("p", Pins("AB11"), IOStandard("LVDS")), Subsignal("p", Pins("AB11"), IOStandard("LVDS")),
Subsignal("n", Pins("AC11"), IOStandard("LVDS")) Subsignal("n", Pins("AC11"), IOStandard("LVDS"))
@ -114,5 +113,4 @@ class Platform(XilinxPlatform):
def do_finalize(self, fragment): def do_finalize(self, fragment):
XilinxPlatform.do_finalize(self, fragment) XilinxPlatform.do_finalize(self, fragment)
self.add_period_constraint(self.lookup_request("clk200", loose=True), 1e9/200e6) self.add_period_constraint(self.lookup_request("clk200", loose=True), 1e9/200e6)
self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6)