Hardware
/
litex-boards
mirror of https://github.com/litex-hub/litex-boards.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

enclustra_mercury_kx2: remove useless clk100, because it is not connected to a clock pin

This commit is contained in:
Hans Baier 2022-05-20 04:42:06 +07:00
parent f1e021cbbe
commit 2214c7baec
1 changed files with 1 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
litex_boards/platforms/enclustra_mercury_kx2.py
View File

@ -12,7 +12,6 @@ from litex.build.openocd import OpenOCD
_io = [
# Clk / Rst
("clk100", 0, Pins("AD24"), IOStandard("LVCMOS18")),
("clk200", 0,
Subsignal("p", Pins("AB11"), IOStandard("LVDS")),
Subsignal("n", Pins("AC11"), IOStandard("LVDS"))
@ -115,4 +114,3 @@ class Platform(XilinxPlatform):
def do_finalize(self, fragment):
XilinxPlatform.do_finalize(self, fragment)
self.add_period_constraint(self.lookup_request("clk200", loose=True), 1e9/200e6)
self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6)