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litex-boards
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fixed issue with default programmer option

This commit is contained in:
Adam Zeloof 2022-09-10 18:16:04 +01:00
parent 6768be7f66
commit 25c28d2c03
2 changed files with 8 additions and 7 deletions
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8
litex_boards/platforms/gsd_butterstick.py
View File

@ -195,13 +195,13 @@ class Platform(LatticePlatform):
connectors = {"1.0": _connectors_r1_0}[revision]
LatticePlatform.__init__(self, f"LFE5UM5G-{device}-8BG381C", io, connectors, toolchain=toolchain, **kwargs)
def create_programmer(self, load):
if load == "jtag":
def create_programmer(self, programmer):
if programmer == "jtag":
return OpenOCDJTAGProgrammer("openocd_butterstick.cfg")
elif load == "dfu":
elif programmer == "dfu":
return DFUProg(vid="1209", pid="5af1", alt=0)
else:
print("Could not program board. " + load + " is not a valid argument. Please use 'jtag' or 'dfu'.")
print("Could not program board. " + programmer + " is not a valid argument. Please use 'jtag' or 'dfu'.")
def do_finalize(self, fragment):
LatticePlatform.do_finalize(self, fragment)

7
litex_boards/targets/gsd_butterstick.py
View File

@ -8,7 +8,7 @@
# SPDX-License-Identifier: BSD-2-Clause
# Build/Use:
# ./gsd_butterstick.py --uart-name=crossover --with-etherbone --csr-csv=csr.csv --build --load (jtag / dfu)
# ./gsd_butterstick.py --uart-name=crossover --with-etherbone --csr-csv=csr.csv --build --load --programmer (jtag / dfu)
# litex_server --udp
# litex_term crossover
@ -155,7 +155,8 @@ def main():
parser = LiteXSoCArgumentParser(description="LiteX SoC on ButterStick")
target_group = parser.add_argument_group(title="Target options")
target_group.add_argument("--build", action="store_true", help="Build design.")
target_group.add_argument("--load", default="jtag", help="Load bitstream (jtag or dfu).")
target_group.add_argument("--load", action="store_true", help="Load bitstream.")
target_group.add_argument("--programmer", default="jtag", help="Programming interface (jtag or dfu).")
target_group.add_argument("--toolchain", default="trellis", help="FPGA toolchain (trellis or diamond).")
target_group.add_argument("--sys-clk-freq", default=75e6, help="System clock frequency.")
target_group.add_argument("--revision", default="1.0", help="Board Revision (1.0).")
@ -201,7 +202,7 @@ def main():
builder.build(**builder_kargs)
if args.load:
prog = soc.platform.create_programmer(args.load)
prog = soc.platform.create_programmer(args.programmer)
prog.load_bitstream(builder.get_bitstream_filename(mode="sram"))
if __name__ == "__main__":