platforms/crosslink_nx_evn: Fix 5412d0e
always disabling uartbone
Also fix a warning about register_mem being deprecated, taking inspiration from platforms/crosslink_nx_vip
This commit is contained in:
parent
3903cdee92
commit
3c0b6956cc
|
@ -21,6 +21,7 @@ from litex.build.generic_platform import *
|
|||
|
||||
from litex.soc.cores.clock import *
|
||||
from litex.soc.integration.soc_core import *
|
||||
from litex.soc.integration.soc import SoCRegion
|
||||
from litex.soc.integration.builder import *
|
||||
from litex.soc.cores.led import LedChaser
|
||||
|
||||
|
@ -68,6 +69,7 @@ class BaseSoC(SoCCore):
|
|||
}
|
||||
def __init__(self, sys_clk_freq=75e6, device="LIFCL-40-9BG400C", toolchain="radiant",
|
||||
with_led_chaser = True,
|
||||
with_uartbone = False,
|
||||
**kwargs):
|
||||
platform = lattice_crosslink_nx_evn.Platform(device=device, toolchain=toolchain)
|
||||
|
||||
|
@ -84,7 +86,7 @@ class BaseSoC(SoCCore):
|
|||
# 128KB LRAM (used as SRAM) ---------------------------------------------------------------
|
||||
size = 128*kB
|
||||
self.spram = NXLRAM(32, size)
|
||||
self.register_mem("sram", self.mem_map["sram"], self.spram.bus, size)
|
||||
self.bus.add_slave("sram", self.spram.bus, SoCRegion(origin=self.mem_map["sram"], size=size))
|
||||
|
||||
# Leds -------------------------------------------------------------------------------------
|
||||
if with_led_chaser:
|
||||
|
@ -93,8 +95,7 @@ class BaseSoC(SoCCore):
|
|||
sys_clk_freq = sys_clk_freq)
|
||||
|
||||
# UARTBone ---------------------------------------------------------------------------------
|
||||
debug_uart = False
|
||||
if debug_uart:
|
||||
if with_uartbone:
|
||||
self.add_uartbone()
|
||||
|
||||
|
||||
|
@ -109,12 +110,14 @@ def main():
|
|||
parser.add_target_argument("--programmer", default="radiant", help="Programmer (radiant or ecpprog).")
|
||||
parser.add_target_argument("--address", default=0x0, help="Flash address to program bitstream at.")
|
||||
parser.add_target_argument("--prog-target", default="direct", help="Programming Target (direct or flash).")
|
||||
parser.add_target_argument("--with-uartbone", action="store_true", help="Add UartBone on 1st serial.")
|
||||
args = parser.parse_args()
|
||||
|
||||
soc = BaseSoC(
|
||||
sys_clk_freq = args.sys_clk_freq,
|
||||
device = args.device,
|
||||
toolchain = args.toolchain,
|
||||
with_uartbone = args.with_uartbone,
|
||||
**parser.soc_argdict
|
||||
)
|
||||
builder = Builder(soc, **parser.builder_argdict)
|
||||
|
|
Loading…
Reference in New Issue