add colorlight v8.0 PCB
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@ -185,7 +185,89 @@ _io_v7_0 = [ # Documented by @miek
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),
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]
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# From https://github.com/miek/chubby75/blob/5a-75b-v7_pinout/5a-75b/hardware_V6.1.md
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_io_v8_0 = [
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# Clk
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("clk25", 0, Pins("P6"), IOStandard("LVCMOS33")),
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# Led
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("user_led_n", 0, Pins("T6"), IOStandard("LVCMOS33")),
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# Button
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("user_btn_n", 0, Pins("R7"), IOStandard("LVCMOS33")),
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# serial
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("serial", 0,
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Subsignal("tx", Pins("T6")), # led (J19 DATA_LED-)
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Subsignal("rx", Pins("R7")), # btn (J19 KEY+)
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IOStandard("LVCMOS33")
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),
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# SPIFlash (W25Q32JV)
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("spiflash", 0,
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# clk
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Subsignal("cs_n", Pins("N8")),
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#Subsignal("clk", Pins("")), driven through USRMCLK
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Subsignal("mosi", Pins("T8")),
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Subsignal("miso", Pins("T7")),
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IOStandard("LVCMOS33"),
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),
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# SDR SDRAM (M12L64322A)
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("sdram_clock", 0, Pins("C8"), IOStandard("LVCMOS33")),
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("sdram", 0,
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Subsignal("a", Pins(
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"A9 B9 B10 C10 D9 C9 E9 D8",
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"E8 C7 B8")),
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Subsignal("dq", Pins(
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"B2 A2 C3 A3 B3 A4 B4 A5",
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"E7 C6 D7 D6 E6 D5 C5 E5",
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"A11 B11 B12 A13 B13 A14 B14 D14",
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"D13 E11 C13 D11 C12 E10 C11 D10")),
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Subsignal("we_n", Pins("B5")),
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Subsignal("ras_n", Pins("B6")),
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Subsignal("cas_n", Pins("A6")),
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#Subsignal("cs_n", Pins("")), # gnd
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#Subsignal("cke", Pins("")), # 3v3
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Subsignal("ba", Pins("B7 A8")),
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#Subsignal("dm", Pins("")), # gnd
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IOStandard("LVCMOS33"),
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Misc("SLEWRATE=FAST")
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),
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# RGMII Ethernet (RTL8211FD)
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("eth_clocks", 0,
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Subsignal("tx", Pins("L1")),
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Subsignal("rx", Pins("J1")),
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IOStandard("LVCMOS33")
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),
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("eth", 0,
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Subsignal("rst_n", Pins("R6")),
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Subsignal("mdio", Pins("T4")),
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Subsignal("mdc", Pins("R5")),
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Subsignal("rx_ctl", Pins("J2")),
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Subsignal("rx_data", Pins("K2 J3 K1 K3")),
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Subsignal("tx_ctl", Pins("L2")),
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Subsignal("tx_data", Pins("M2 M1 P1 R1")),
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IOStandard("LVCMOS33")
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),
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("eth_clocks", 1,
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Subsignal("tx", Pins("J16")),
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Subsignal("rx", Pins("M16")),
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IOStandard("LVCMOS33")
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),
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("eth", 1,
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Subsignal("rst_n", Pins("R6")),
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Subsignal("mdio", Pins("T4")),
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Subsignal("mdc", Pins("R5")),
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Subsignal("rx_ctl", Pins("P16")),
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Subsignal("rx_data", Pins("M15 R16 L15 L16")),
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Subsignal("tx_ctl", Pins("K14")),
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Subsignal("tx_data", Pins("K16 J15 J14 K15")),
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IOStandard("LVCMOS33")
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),
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]
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# from https://github.com/miek/chubby75/blob/5a-75b-v7_pinout/5a-75b/hardware_V6.1.md
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_connectors_v6_1 = [
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("j1", "B3 A2 B2 - B1 C2 C1 J17 F1 E2 E1 F2 C18 J18 H16 -"),
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("j2", "D2 H3 H4 - J4 B4 A3 J17 F1 E2 E1 F2 C18 J18 H16 -"),
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@ -209,19 +291,33 @@ _connectors_v7_0 = [
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("j8", "A15 F16 A14 - E13 B14 A13 F15 L2 K1 J5 K2 B16 J14 F12 -"),
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]
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# from https://github.com/q3k/chubby75/blob/master/5a-75b/hardware_V8.0.md
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_connectors_v8_0 = [
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("j1", "C4 D4 E4 - D3 F5 E3 N4 N5 N3 P3 P4 M3 N1 M4 -"),
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("j2", "F1 F2 G2 - G1 H2 H3 N4 N5 N3 P3 P4 M3 N1 M4 -"),
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("j3", "B1 C2 C1 - D1 E2 E1 N4 N5 N3 P3 P4 M3 N1 M4 -"),
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("j4", "P5 R3 P2 - R2 T2 N6 N4 N5 N3 P3 P4 M3 N1 M4 -"),
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("j5", "T13 R12 R13 - R14 T14 P12 N4 N5 N3 P3 P4 M3 N1 M4 -"),
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("j6", "R15 T15 P13 - P14 N14 H15 N4 N5 N3 P3 P4 M3 N1 M4 -"),
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("j7", "G16 H14 G15 - F15 F16 E16 N4 N5 N3 P3 P4 M3 N1 M4 -"),
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("j8", "D16 E15 C16 - B16 C15 B15 N4 N5 N3 P3 P4 M3 N1 M4 -"),
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(LatticePlatform):
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default_clk_name = "clk25"
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default_clk_period = 1e9/25e6
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def __init__(self, revision="7.0", toolchain="trellis"):
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assert revision in ["6.1", "7.0"]
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def __init__(self, revision="7.0"):
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assert revision in ["6.1", "7.0", "8.0"]
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self.revision = revision
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device = {"6.1": "LFE5U-25F-6BG381C", "7.0": "LFE5U-25F-6BG256C"}[revision]
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io = {"6.1": _io_v6_1, "7.0": _io_v7_0}[revision]
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connectors = {"6.1": _connectors_v6_1, "7.0": _connectors_v7_0}[revision]
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LatticePlatform.__init__(self, device, io, connectors=connectors, toolchain=toolchain)
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device = {"6.1": "LFE5U-25F-6BG381C", "7.0": "LFE5U-25F-6BG256C", "8.0": "LFE5U-25F-6BG256C"}[revision]
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io = {"6.1": _io_v6_1, "7.0": _io_v7_0, "8.0": _io_v8_0}[revision]
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connectors = {"6.1": _connectors_v6_1, "7.0": _connectors_v7_0, "8.0": _connectors_v8_0}[revision]
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LatticePlatform.__init__(self, device, io, connectors=connectors, toolchain="trellis")
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def create_programmer(self):
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return OpenOCDJTAGProgrammer("openocd_colorlight_5a_75b.cfg")
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@ -230,4 +326,5 @@ class Platform(LatticePlatform):
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LatticePlatform.do_finalize(self, fragment)
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self.add_period_constraint(self.lookup_request("clk25", loose=True), 1e9/25e6)
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self.add_period_constraint(self.lookup_request("eth_clocks:rx", 0, loose=True), 1e9/125e6)
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self.add_period_constraint(self.lookup_request("eth_clocks:rx", 1, loose=True), 1e9/125e6)
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self.add_period_constraint(self.lookup_request("eth_clocks:rx", 1, loose=True), 1e9/125e6)
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