dispatch platforms/targets by level of support

litex_boards/community/targets/ac701.py

@@ -4,7 +4,7 @@ import argparse
 
 from migen import *
 
-from litex_boards.official.platforms import ac701
+from litex_boards.community.platforms import ac701
 
 from litex.soc.cores.clock import *
 from litex.soc.integration.soc_core import mem_decoder

litex_boards/community/targets/de10lite.py

@@ -4,7 +4,7 @@ import argparse
 
 from migen import *
 
-from litex_boards.official.platforms import de10lite
+from litex_boards.community.platforms import de10lite
 
 from litex.soc.integration.soc_sdram import *
 from litex.soc.integration.builder import *

litex_boards/community/targets/de1soc.py

@@ -11,7 +11,7 @@ import argparse
 
 from migen import *
 
-from litex_boards.official.platforms import de1soc
+from litex_boards.community.platforms import de1soc
 
 from litex.soc.integration.soc_sdram import *
 from litex.soc.integration.builder import *

litex_boards/community/targets/de2_115.py

@@ -11,7 +11,7 @@ import argparse
 
 from migen import *
 
-from litex_boards.official.platforms import de2_115
+from litex_boards.community.platforms import de2_115
 
 from litex.soc.integration.soc_sdram import *
 from litex.soc.integration.builder import *

litex_boards/partner/targets/netv2.py

@@ -4,7 +4,7 @@ import argparse
 
 from migen import *
 
-from litex_boards.official.platforms import netv2
+from litex_boards.partner.platforms import netv2
 
 from litex.soc.cores.clock import *
 from litex.soc.integration.soc_core import mem_decoder

litex_boards/partner/targets/ulx3s.py

@@ -5,7 +5,7 @@ import argparse
 from migen import *
 from migen.genlib.resetsync import AsyncResetSynchronizer
 
-from litex_boards.official.platforms import ulx3s
+from litex_boards.partner.platforms import ulx3s
 
 from litex.soc.cores.clock import *
 from litex.soc.integration.soc_sdram import *