Support SPI Flash in Colorlight 5A-75x
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96175a9986
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@ -128,6 +128,7 @@ class BaseSoC(SoCCore):
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with_led_chaser = True,
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with_led_chaser = True,
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use_internal_osc = False,
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use_internal_osc = False,
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sdram_rate = "1:1",
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sdram_rate = "1:1",
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with_spi_flash = False,
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**kwargs):
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**kwargs):
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board = board.lower()
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board = board.lower()
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assert board in ["5a-75b", "5a-75e", "i5a-907"]
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assert board in ["5a-75b", "5a-75e", "i5a-907"]
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@ -197,6 +198,25 @@ class BaseSoC(SoCCore):
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raise ValueError("uartbone only supported on i5a-907")
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raise ValueError("uartbone only supported on i5a-907")
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self.add_uartbone(name="uartbone")
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self.add_uartbone(name="uartbone")
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# SPI Flash --------------------------------------------------------------------------------
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if with_spi_flash:
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if board == "i5a-907":
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raise ValueError("SPI Flash chip is unknown on i5a-907, feel free to fix")
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# from litespi.modules import XXXXXX as SpiFlashModule
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elif board == "5a-75b" and revision == "6.0":
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raise ValueError("SPI Flash chip is unknown on 5A-75B v6.0, feel free to fix")
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# from litespi.modules import XXXXXX as SpiFlashModule
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elif board == "5a-75b" and revision == "6.1":
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# It's very possible that V6.0 uses this as well, but no documentation can be found for it
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from litespi.modules import GD25Q16C as SpiFlashModule
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# 5A-75B v7.0/v8.0 and all 5A-75Es seem to use W25Q32JV
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else:
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from litespi.modules import W25Q32JV as SpiFlashModule
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from litespi.opcodes import SpiNorFlashOpCodes
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self.mem_map["spiflash"] = 0x20000000
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self.add_spi_flash(mode="1x", module=SpiFlashModule(SpiNorFlashOpCodes.READ_1_1_1), with_master=False)
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# Build --------------------------------------------------------------------------------------------
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# Build --------------------------------------------------------------------------------------------
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@ -214,6 +234,7 @@ def main():
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parser.add_target_argument("--eth-phy", default=0, type=int, help="Ethernet PHY (0 or 1).")
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parser.add_target_argument("--eth-phy", default=0, type=int, help="Ethernet PHY (0 or 1).")
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parser.add_target_argument("--use-internal-osc", action="store_true", help="Use internal oscillator.")
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parser.add_target_argument("--use-internal-osc", action="store_true", help="Use internal oscillator.")
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parser.add_target_argument("--sdram-rate", default="1:1", help="SDRAM Rate (1:1 Full Rate or 1:2 Half Rate).")
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parser.add_target_argument("--sdram-rate", default="1:1", help="SDRAM Rate (1:1 Full Rate or 1:2 Half Rate).")
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parser.add_target_argument("--with-spi-flash", action="store_true", help="Add SPI flash support to the SoC")
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args = parser.parse_args()
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args = parser.parse_args()
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soc = BaseSoC(board=args.board, revision=args.revision,
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soc = BaseSoC(board=args.board, revision=args.revision,
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@ -226,6 +247,7 @@ def main():
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eth_phy = args.eth_phy,
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eth_phy = args.eth_phy,
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use_internal_osc = args.use_internal_osc,
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use_internal_osc = args.use_internal_osc,
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sdram_rate = args.sdram_rate,
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sdram_rate = args.sdram_rate,
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with_spi_flash = args.with_spi_flash,
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**parser.soc_argdict
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**parser.soc_argdict
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)
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)
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builder = Builder(soc, **parser.builder_argdict)
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builder = Builder(soc, **parser.builder_argdict)
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