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crosslink_nx_vip: Remove constraint for MIPI pins 

Signed-off-by: gatecat <gatecat@ds0.me>
This commit is contained in:
gatecat 2021-03-08 14:26:40 +00:00
parent 9cdcb8cb43
commit 496cae54ff
1 changed files with 9 additions and 8 deletions
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17
litex_boards/platforms/crosslink_nx_vip.py
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@ -119,17 +119,18 @@ _io = [
# MIPI camera modules # MIPI camera modules
# Note that use of MIPI_DPHY standard for + and LVCMOS12H for - is copied from Lattice PDC # Note that use of MIPI_DPHY standard for + and LVCMOS12H for - is copied from Lattice PDC
# MIPI pins are unconstrained to work around a Radiant 2.0 bug
("camera", 0, ("camera", 0,
Subsignal("clkp", Pins("A2"), IOStandard("MIPI_DPHY")), Subsignal("clkp", Pins("X")),
Subsignal("clkn", Pins("B1"), IOStandard("LVCMOS12H")), Subsignal("clkn", Pins("X")),
Subsignal("dp", Pins("B2 A3 C2 A4"), IOStandard("MIPI_DPHY")), Subsignal("dp", Pins("X X X X")),
Subsignal("dn", Pins("C1 B3 D1 B4"), IOStandard("LVCMOS12H")), Subsignal("dn", Pins("X X X X")),
), ),
("camera", 1, ("camera", 1,
Subsignal("clkp", Pins("A8"), IOStandard("MIPI_DPHY")), Subsignal("clkp", Pins("X")),
Subsignal("clkn", Pins("B8"), IOStandard("LVCMOS12H")), Subsignal("clkn", Pins("X")),
Subsignal("dp", Pins("A7 A9 A6 A10"), IOStandard("MIPI_DPHY")), Subsignal("dp", Pins("X X X X")),
Subsignal("dn", Pins("B7 B9 B6 B10"), IOStandard("LVCMOS12H")), Subsignal("dn", Pins("X X X X")),
), ),
("camera", 2, ("camera", 2,
Subsignal("clkp", Pins("W11"), IOStandard("MIPI_DPHY")), Subsignal("clkp", Pins("W11"), IOStandard("MIPI_DPHY")),